Flip-flop circuit for capturing input signals in priority order

Details Flip-flop circuit for capturing input signals in priority order Flip-flop circuit for capturing input signals in priority order

2006-10-03

2006-10-03

Kerveros, James C. (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S727000, C327S202000

Reexamination Certificate

active

07117412

ABSTRACT:
A flip-flop circuit includes first and second logic gates, a first selection circuit and a latch circuit. The first logic gate executes a logic operation on a first data signal and a first control signal. The second logic gate executes a logic operation on a second data signal and the first control signal. The operation results of the first and second logic gates are forcibly fixed to a predetermined value irrespective of the first and second data signals, if the first control signal is asserted. A first selection circuit selects one of the operation results of the first and second logic gates, and outputs the selected operation result as a first selection signal. A latch circuit latches the first selection signal.

REFERENCES:
patent: 4740970 (1988-04-01), Burrows et al.
patent: 6614276 (2003-09-01), Robertson et al.

Affiliated with

Also associated with

Rating

Flip-flop circuit for capturing input signals in priority order does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Flip-flop circuit for capturing input signals in priority order, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flip-flop circuit for capturing input signals in priority order will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3688099