Flip chip package and manufacturing method thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Details

C438S122000, C257SE21499

Reexamination Certificate

active

10709588

ABSTRACT:
A flip chip package structure and manufacturing method thereof is provided. A chip is electrically connected to a substrate. A heat sink is attached to the backside of the chip. The heat sink has at least a through hole located at a peripheral region and laterally adjacent to the chip. A dispensing process is carried out to deliver an underfill material via the through hole such that the space between the chip and the substrate is filled. The underfill material also extends to cover a portion of the heat sink so that the heat sink and the substrate are connected together. The underfill material is cured to fix the heat sink, the substrate and the chip in position.

REFERENCES:
patent: 6187613 (2001-02-01), Wu et al.
patent: 6600232 (2003-07-01), Chiu et al.
patent: 6602740 (2003-08-01), Mitchell
patent: 6617682 (2003-09-01), Ma et al.
patent: 6979600 (2005-12-01), Brandenburger

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