Flip chip having integral mask and underfill providing...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Details

C438S612000, C438S613000, C438S614000, C228S180210, C228S180220

Reexamination Certificate

active

06228681

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a novel flip chip design. More particularly, the present invention relates to a flip chip which incorporates two-stage bumps, flux and an underfill material, wherein the underfill material acts as a mask during application of the bumps in a manner that supports the fabrication of two-stage bumps.
BACKGROUND OF THE INVENTION
In the electronics industry, electrical components such as resisters, capacitors, inductors, transistors, integrated circuits, chip carriers and the like are typically mounted on circuit boards in one of two ways. In the first way, the components are mounted on one side of the board and leads from the components extend through holes in the board and are soldered on the opposite side of the board. In the second way, the components are soldered to the same side of the board upon which they are mounted. These latter devices are said to be “surface-mounted.”
Surface mounting of electronic components is a desirable technique in that it may be used to fabricate very small circuit structures and in that it lends itself well to process automation. One family of surface-mounted devices, referred to as “flip chips”, comprises integrated circuit devices having numerous connecting leads attached to pads mounted on the underside of the device. In connection with the use of flip chips, either the circuit board or the chip is provided with small bumps or balls of solder (hereafter “bumps” or “solder bumps”) positioned in locations which correspond to the pads on the underside of each chip and on the surface of the circuit board. The chip is mounted by (a) placing it in contact with the board such that the solder bumps become sandwiched between the pads on the board and the corresponding pads on the chip; (b) heating the assembly to a point at which the solder is caused to reflow (i.e., melt); and (c) cooling the assembly. Upon cooling, the solder hardens, thereby mounting the flip chip to the board's surface. Tolerances in devices using flip chip technology are critical, as the spacing between individual devices as well as the spacing between the chip and the board is typically very small. For example, spacing of such chips from the surface of the board is typically in the range of 0.5-3.0 mil and is expected to approach micron spacing in the near future.
Although many materials can be used to form the bumps used on a flip chip, metallurgical solder is the most common. Several methods of applying solder to the pads on a flip chip are known to those having ordinary skill in the art. These methods include: vacuum metallization, electrolytic deposition, electroless deposition, and stencil printing of solder paste. In many of these processes, a mask formed of a polymeric material, (also called a resist), is applied to the wafer and openings are created in the mask at the chip pad locations. Bumps formed in the mask openings are referred to herein as columns. The mask is later removed.
Although many types of bumps have been developed over the past years, a stratified bump composition containing more than one material zone has shown promise. This is because a bump having at least two different material zones can have each zone tailored to the specific substrate or application involved at the specific material zone. For example, the section of bump attached to the pad on the integrated circuit is typically made of a high temperature alloy so that melting will not occur during assembly. This ensures that the bump will not over-collapse and produce low height and too narrow a gap between the chip and the circuit board to which the chip is attached. In contrast, however, it is desirable to have the surface of the bump that contacts the circuit board to be of a relatively low melting point material so that reflow and adherence to the circuit board can be achieved without the need for excessive heat. Thus, it should be apparent that an ideal bump would have a high melting point portion mounted to the integrated circuit chip, and a low melting point portion in contact with the circuit board.
The present method for making such bumps involves vacuum-depositing a high lead alloy such as 3Sn/97Pb followed by coating with eutectic solder. Such bumps are referred to as “two-stage” bumps. After reflow soldering, the chip is then underfilled for the reasons described below.
One problem associated with flip chip technology is that the chips, the bumps and the material forming the circuit board often have significantly different coefficients of thermal expansion. As a result, differing expansions as the assembly heats during use can cause severe stresses, i.e., thermomechanical fatigue, at the chip connections and can lead to failures which degrade device performance or incapacitate the device entirely.
In order to minimize thermomechanical fatigue resulting from different thermal expansions, thermoset epoxies have been used. Specifically, these epoxies are used as an underfill material which surrounds the periphery of the flip chip and occupies the space beneath the chip between the underside of the chip and the board which is not occupied by solder. Such epoxy systems provide a level of protection by forming a physical barrier which resists or reduces different expansions among the components of the device.
Improved underfill materials have been developed in which the epoxy thermoset matenal is provided with a silica powder filler. By varying the amount of filler material, it is possible to cause the coefficient of thermal expansion of the filled epoxy thermoset to match that of the solder. In so doing, relative movement between the underside of the flip chip and the solder connections, resulting from their differing coefficients of thermal expansion, is minimized. Such filled epoxy thermosets therefore reduce the likelihood of device failure resulting from thermomechanical fatigue during operation of the device.
While underfill has solved the thermal mismatch problem for flip chips on printed circuit boards, it has created significant difficulties in the manufacturing process. For example, the underfill must be applied off-line using special equipment. Typically, the underfill is applied to up to three edges of the assembled flip chip and allowed to flow all the way under the chip. Once the material has flowed to opposite edges and all air has been displaced from under the chip, additional underfill is dispensed to the outer edges so as to form a fillet making all four edges symmetrical. This improves reliability and appearance. Next, the assembly is baked in an oven to harden the underfill. This process, which may take up to several hours, is necessary to harden and fully cure the underfill. Thus, although the underfill solves the thermal mismatch problem and provides a commercially viable solution, a simpler manufacturing method would be desirable.
Recently, attempts have been made to improve and streamline the underfill process. One method that has shown some commercial potential involves dispensing underfill before assembling the flip chip to the board. This method requires that the underfill allow solder joint formation to occur. Soldering of flip chips to printed circuit boards is generally accomplished by applying flux to the bumps on the flip chip or to the circuit pads on the printed circuit board. Thus, it has been suggested to use an underfill that is dispensed first, prior to making solder connections. In order to facilitate solder bonding, however, the underfill must contain flux or have inherent properties that facilitate solder joint formation. Flux is used since the pads on printed circuit boards often oxidize, and since solder bumps on flip chips are always oxidized. Thus, the flux is designed to remove the oxide layers facilitating solder joint formation.
Certain underfills commonly called “dispense first underfills” have been designed with self-contained flux chemistry. Unfortunately, the properties required for a good flux and those required for a good underfill are not totally compatible. As such, a compromise

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