Flat no-lead semiconductor die package including stud terminals

Details Flat no-lead semiconductor die package including stud terminals Flat no-lead semiconductor die package including stud terminals

2006-06-13

2006-06-13

Everhart, Caridad (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C257S702000

Reexamination Certificate

active

07060535

ABSTRACT:
A flat no-lead semiconductor die package contains a plurality of studs that protrude from the bottom surface of the capsule and act as electrical contacts, allowing the package to be mounted on a flat surface such as a printed circuit board, while permitting external circuit to be located on the flat surface directly beneath the package. The package may or may not contain a die-attach pad. The die may be mounted flip-chip style on the stud contacts and die-attach pad. A method of fabricating the package includes etching an upper portion of a metal sheet through a mask layer, attaching dice at locations on the surface of the metal sheet, forming a layer of molding compound over the dice, etching the lower portion of the metal sheet through a second mask layer, and separating the packages with a dicing saw or punch tool.

REFERENCES:
patent: 5567984 (1996-10-01), Zalesinski et al.
patent: 5693573 (1997-12-01), Choi
patent: 6031292 (2000-02-01), Murakami et al.
patent: 6713849 (2004-03-01), Hasebe et al.
patent: 6812552 (2004-11-01), Islam et al.

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