Flash memory system, host system for programming the flash...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C711S157000

Reexamination Certificate

active

07873777

ABSTRACT:
Provided are a multi-channel flash memory system capable of increasing the overall bandwidth by using a plurality of flash memory chips, and a programming method performed in the flash memory system. The flash memory system includes: a plurality of channel units each including at least two flash memory chips, a control unit which controls the flash memory chips, and a buffer unit which stores external data; and a host interface unit which transmits data separated according to the number of the channel units and transmitted by a host to the buffer units of the channel units, wherein the control unit records the data stored in the buffer unit into the at least two flash memory chips.

REFERENCES:
patent: 6026465 (2000-02-01), Mills et al.
patent: 7010652 (2006-03-01), Piccirillo et al.
patent: 7065126 (2006-06-01), Reznik et al.
patent: 7089379 (2006-08-01), Sharma et al.
patent: 2004/0256638 (2004-12-01), Perego et al.
patent: 2005/0223158 (2005-10-01), See et al.

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