Flash memory system compensating reduction in read margin...

Details Flash memory system compensating reduction in read margin... Flash memory system compensating reduction in read margin...

2006-11-13

2010-06-08

Chace, Christian P (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S103000, C711S163000, C711S167000, C365S185180, C365S185330

Reexamination Certificate

active

07734880

ABSTRACT:
A memory system includes a flash memory and a memory controller configured to control the flash memory. The memory controller determines whether program data provided from a host are all stored in the flash memory during a program operation. When the determination result is that the program data are all stored in the flash memory, the memory controller controls the flash memory to execute a dummy program operation for the next wordline of a final wordline in which the program data are stored.

REFERENCES:
patent: 6925012 (2005-08-01), Yamagami et al.
patent: 7020017 (2006-03-01), Chen et al.
patent: 7196946 (2007-03-01), Chen et al.
patent: 2001/0015905 (2001-08-01), Kim et al.

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