Flash memory device having resistivity measurement pattern...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S211000, C438S218000, C438S221000, C438S259000, C438S261000, C438S264000, C438S265000, C438S294000, C438S296000, C438S593000, C438S594000

Reexamination Certificate

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07439131

ABSTRACT:
A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the resistivity of the floating gate to be measured even in the SAFG scheme. Contacts for resistivity measurement are directly connected to the resistivity measurement floating gate. Therefore, variation in resistivity measurement values, which is incurred by the parasitic interface, can be reduced.

REFERENCES:
patent: 5488243 (1996-01-01), Tsuruta et al.
patent: 2005/0009332 (2005-01-01), Lee et al.
patent: 04-164372 (1992-06-01), None

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