Flash memory device and programming method thereof

Details Flash memory device and programming method thereof Flash memory device and programming method thereof

2008-05-30

2010-10-12

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S189050, C365S230020, C365S230080

Reexamination Certificate

active

07813186

ABSTRACT:
A flash memory device includes a memory cell array including a plurality of memory cells, a page buffer unit including a plurality of page buffers connected to bit lines of the memory cell array, a data line mux unit connected between the page buffer unit and a data line and configured to receive verification data through a page buffer during a verify operation. The flash memory device also includes a fail bit counter unit for counting the verification data, comparing counted fail bits and the number of ECC allowed bits, and outputting a pass or fail signal of a program operation according to the comparison result.

REFERENCES:
patent: 5671178 (1997-09-01), Park et al.
patent: 6724682 (2004-04-01), Lee et al.
patent: 6998873 (2006-02-01), Park
patent: 7567456 (2009-07-01), Zanardi et al.
patent: 1020070082999 (2007-08-01), None

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