Flash memory device and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S318000

Reexamination Certificate

active

07858473

ABSTRACT:
A flash memory device having a spacer of a gate region formed in an oxide-nitride-oxide (ONO) structure and a source/drain region formed using the ONO structure. The outermost oxide in the ONO structure is removed and an interlayer insulating film is formed to ensure sufficient space between the gate regions. Thus, it is possible to prevent a void from being generated in the interlayer insulating film and prevent a word line from being electrically connected to a drain contact for forming a bit line.

REFERENCES:
patent: 5436489 (1995-07-01), Murase
patent: 2002/0192915 (2002-12-01), Wada et al.
patent: 2005/0048754 (2005-03-01), Yeh et al.
patent: 2006/0163678 (2006-07-01), Anezaki
patent: 1591823 (2005-03-01), None

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