Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-31
2010-12-28
Lee, Calvin (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S318000
Reexamination Certificate
active
07858473
ABSTRACT:
A flash memory device having a spacer of a gate region formed in an oxide-nitride-oxide (ONO) structure and a source/drain region formed using the ONO structure. The outermost oxide in the ONO structure is removed and an interlayer insulating film is formed to ensure sufficient space between the gate regions. Thus, it is possible to prevent a void from being generated in the interlayer insulating film and prevent a word line from being electrically connected to a drain contact for forming a bit line.
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patent: 2006/0163678 (2006-07-01), Anezaki
patent: 1591823 (2005-03-01), None
Kim Jae-Hee
Park Jin-Ha
Dongbu Hi-Tek Co., Ltd.
Lee Calvin
Sherr & Vaughn, PLLC
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