Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-12-30
2009-06-30
Graybill, David E (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S211000, C438S257000, C438S593000
Reexamination Certificate
active
07553719
ABSTRACT:
A flash memory device includes a source region formed in an active region of a semiconductor substrate; a recessed region formed in the active region on either side of the source region, the recessed region including a recess surface having sidewalls; floating gates formed at the sidewalls of the recess surface by interposing a tunnel insulating film; a source line formed on the source region across the active region; and control gate electrodes formed at sidewalls of the source line across a portion of the active region where the floating gates are formed. The floating gates and the control gate electrodes are formed by anisotropically etching a conformal conductive film to have a spacer structure. Cell transistor size can be reduced by forming a deposition gate structure at both sides of the source line, and short channel effects can be minimized by forming the channel between the sidewalls of a recess surface.
REFERENCES:
patent: 2005/0098094 (2005-05-01), Oh et al.
patent: 2006/0043464 (2006-03-01), Tsunoda et al.
patent: 2007/0052000 (2007-03-01), Lee
Dongbu Electronics Co. Ltd.
Graybill David E
McKenna Long & Aldridge LLP
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