Flash memory device and associated data merge method

Details Flash memory device and associated data merge method Flash memory device and associated data merge method

2005-12-29

2009-02-03

Elmore, Reba I (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S103000, C711S205000, C711S209000

Reexamination Certificate

active

07487303

ABSTRACT:
A memory system comprises a flash memory and a controller comprising a control logic circuit and a working memory storing a flash translation layer. The memory system performs a merge operation by selectively copying a page from a first block of the flash memory to a second block of the flash memory. Where the page is valid and marked as allocated according to a file allocation table stored in the flash memory, the page is copied to the second block. However, where the page is valid and marked as deleted in the file allocation table, the page is not copied to the second block.

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Kim et al., ‘A Space-Efficient Flash Translation Layer for Compactflash Systems’, Apr. 10, 2002, IEEE Transactions on Consumer Electronics, Vol. 48, No. 2 May 2002.

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