Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-04-26
2005-04-26
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S259000, C438S264000
Reexamination Certificate
active
06884679
ABSTRACT:
Disclosed is a flash memory cell and method of manufacturing the same, and programming/erasing/reading method thereof. The flash memory cell comprises a first tunnel oxide film formed at a given region of a semiconductor substrate, a first floating gate formed on the first tunnel oxide film, a second tunnel oxide film formed over the semiconductor substrate and along one sidewall of the first floating gate, a second floating gate isolated from the first floating gate while contacting the second tunnel oxide film, a dielectric film formed on the first floating gate and the second floating gate, a control gate formed on the dielectric film, a first junction region formed in the semiconductor substrate below one side of the second tunnel oxide film, and a second junction region formed in the semiconductor substrate below one side of the first tunnel oxide film. Therefore, the present invention can implement 2-bit cell or 3-bit cell of a high density using the existing process technology. Further, it can reduce the manufacture cost and implement a high-integrated flash memory cell that is advantageous than a conventional flash memory cell in view of charge storage/retention as well as programming time.
REFERENCES:
patent: 6642104 (2003-11-01), Chang
Jeon Yoo Nam
Kim Yong Wook
Park Sung Kee
You Young Seon
Hoang Quoc
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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