Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-08-07
2007-08-07
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S296000, C257SE21680
Reexamination Certificate
active
11315148
ABSTRACT:
An active region and a trench region are formed on a semiconductor substrate. The trench region is filled with a dielectric material to form an isolation layer. Oxide and polysilicon layers are formed on the semiconductor substrate. A second polysilicon layer, a second oxide layer, and a first polysilicon layer are patterned to form a plurality of gate lines. Deep ion implantation in a deep portion of the active region is performed using a self-aligned source mask. The active region and the trench region are exposed through the self-aligned source mask by etching the isolation layer between the plurality of gate lines using the self-aligned source mask to form a common source region. Ions are implanted in the common source region using the self-aligned source mask.
REFERENCES:
patent: 6218265 (2001-04-01), Colpani
patent: 6437397 (2002-08-01), Lin et al.
patent: 6596586 (2003-07-01), Yang et al.
Kim Jum Soo
Yune Ji Hyung
Chaudhari Chandra
Dongbu Electronics Co. Ltd.
McKenna Long & Aldridge LLP
LandOfFree
Flash memory cell and method for manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flash memory cell and method for manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory cell and method for manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3831466