Flash memory cell and fabricating method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S316000

Reexamination Certificate

active

10904749

ABSTRACT:
A flash memory cell is provided. A deep well is disposed in a substrate and a well is disposed within the deep well. A stacked gate structure is disposed on the substrate. A source region and a drain region are disposed in the substrate on each side of the stacked gate structure. A select gate is disposed between the stacked gate structure and the source region. A first gate dielectric layer is disposed between the select gate and the stacked gate structure. A second gate dielectric layer is disposed between the select gate and the substrate. A shallow doped region is disposed in the substrate under the stacked gate structure and the select gate. A deep doped region is disposed in the substrate on one side of the stacked gate structure. The conductive plug on the substrate extends through the drain region and the deep doped region.

REFERENCES:
patent: 6091104 (2000-07-01), Chen

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