First-order loop control configuration for a phase-rotator based

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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375373, H03D 302

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active

057745102

ABSTRACT:
An embodiment of the present invention is electronic circuitry for producing an I-phase quadrant pointer (FI) and a Q-phase quadrant pointer (FQ) by sampling a feed clock (IC) and a quadrature feed clock (QC), the circuitry comprises: a first quadrant detector (406, FIG. 5) for producing the Q-phase quadrant pointer in response to receipt of the feed clock and input data; a second quadrant detector (408, FIG. 5) for producing the I-phase quadrant pointer in response to receipt of the feed clock and the input data; and wherein the I-phase quadrant pointer and the Q-phase quadrant pointer can be utilized to determine the phase quadrant of the input data.

REFERENCES:
patent: 4599732 (1986-07-01), LeFever
patent: 4816775 (1989-03-01), Ryan
patent: 5311545 (1994-05-01), Critchlow
IEEE International Solid-State Circuits Conference, 1994 (pp. 300,301,237,236,329, and 330) Session 18/High-Performance Logic and Circuit Techniques/Paper FA 18.6, A 2.5V Delay-Locked Loop for an 18 Mb 500MB/s DRAM.
IEEE 1992 "Continuously Variable Gigahertz Phase-Shifter IC Covering More Than One Frequency Decade" by Lothar Schmidt and Hans-Martin Rein.

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