First-in, first-out buffer system in an integrated circuit

Details First-in, first-out buffer system in an integrated circuit First-in, first-out buffer system in an integrated circuit

2005-08-23

2005-08-23

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189070, C710S052000, C711S167000

Reexamination Certificate

active

06934198

ABSTRACT:
An integrated circuit having an embedded first-in, first-out (“FIFO”) memory system uses an embedded block random access memory (“BRAM”). Counters operate in both the read and write clock domains. A binary adder adds a first selected offset value and to a first pointer address, and the sum is converted to a first gray code value. The first gray code value is compared to a second gray code value that represents a second pointer address. If the first gray code value equals the second gray code value, the output of the comparator is provided to a logic block that produces a status flag (e.g. ALMOST FULL or ALMOST EMPTY) in the correct clock domain.

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