Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Patent
1999-04-08
2000-12-26
Etienne, Ario
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
710 10, 710126, 710129, G06F 300
Patent
active
06167463&
ABSTRACT:
Devices for a Fibre Channel Arbitrated Loop are initially unconfigured, and during the first loop initialization, arbitrate as a soft addressed device. The chosen address is then stored in non-volatile memory. Once an address is stored in non-volatile memory, during subsequent loop initializations, the device arbitrates as a hard address device. Because the address was chosen during a standard Fibre Channel Loop Initialization Process, the risk of future hard address conflicts is greatly reduced. Preferably, however, firm addresses may be erased by operator control, or by system command. Firm addressing provides the fixed address benefits of hard addressing, but substantially reduces the risk of hard address conflicts, while remaining compatible with the ANSI standards for Fibre Channel.
REFERENCES:
patent: 5901151 (1999-05-01), Bleiweiss et al.
patent: 5941972 (1999-08-01), Hoese et al.
patent: 6041381 (2000-03-01), Hoese
Arp Ronald K
Bain Jeffrey J
Etienne Ario
Hewlett--Packard Company
Winfield Augustus W.
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