Finned memory cells and the fabrication thereof

Details Finned memory cells and the fabrication thereof Finned memory cells and the fabrication thereof

2006-08-31

2008-11-18

Lee, Hsien-ming (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S257000, C438S265000, C257SE21014

Reexamination Certificate

active

07452766

ABSTRACT:
Methods and apparatus are provided. For an embodiment, a plurality fins is formed in a substrate so that the fins protrude from a substrate. After the plurality fins is formed, the fins are isotropically etched to reduce a width of the fins and to round an upper surface of the fins. A first dielectric layer is formed overlying the isotropically etched fins. A first conductive layer is formed overlying the first dielectric layer. A second dielectric layer is formed overlying the first conductive layer. A second conductive layer is formed overlying the second dielectric layer.

REFERENCES:
patent: 7026195 (2006-04-01), Cheng et al.
patent: 7297600 (2007-11-01), Oh et al.
patent: 2006/0141706 (2006-06-01), Hong

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