FIFO memory device having address detection portion

Static information storage and retrieval – Read/write circuit

Patent

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Details

36518902, 365221, 36518904, G11C 1604

Patent

active

059148977

ABSTRACT:
The configuration of a first-in first-out semiconductor storage device is simplified. A write address generating combinational circuit portion (100A) including no sequential circuits generates write addresses by using read addresses generated by a read counter portion (7).

REFERENCES:
patent: 5220529 (1993-06-01), Kohiyama et al.
patent: 5267191 (1993-11-01), Simpson
patent: 5305253 (1994-04-01), Ward

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