Field effect transistors including vertically oriented gate...

Details Field effect transistors including vertically oriented gate... Field effect transistors including vertically oriented gate...

2006-10-31

2006-10-31

Nguyen, Cuong (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S331000, C257S332000

Reexamination Certificate

active

07129541

ABSTRACT:
A field effect transistor on an active region of a semiconductor substrate includes a vertically protruding thin-body portion of the semiconductor substrate and a vertically oriented gate electrode at least partially inside a cavity defined by opposing sidewalls of the vertically protruding portion of the substrate. The transistor further includes an insulating layer surrounding an upper portion of the vertically oriented gate electrode and a laterally oriented gate electrode on the insulating layer and connected to a top portion of the vertically oriented gate electrode. Accordingly, a T-shaped gate electrode is defined having a lateral portion on a top surface of a semiconductor substrate and having a vertical portion at least partially inside a cavity defined by opposing sidewalls of a vertically protruding portion of the substrate.

REFERENCES:
patent: 5614749 (1997-03-01), Ueno
patent: 6093606 (2000-07-01), Lin et al.
patent: 6335247 (2002-01-01), Tews et al.
patent: 2002/0056884 (2002-05-01), Baliga
patent: 2002/0137271 (2002-09-01), Forbes et al.
Yeo, et al., “Design and Fabrication of 50-nm Thin-Body p-MOSFETs With a SiGe Heterostructure Channel,”IEEE Transactions of Electron Devices, vol. 49, No. 2, Feb. 2002.
Kedzierski et al., “A 20 nm Gate-Length Ultra-Thin-Body p-MOSFET With Silicide Source/Drain,”Superlattices and Microstructures, vol. 28, No. 5/6 2000.

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