Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-24
2010-02-09
Toledo, Fernando L (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S624000, C438S625000, C438S525000, C438S629000, C438S630000, C438S634000, C438S637000, C438S638000, C438S680000, C257S288000, C257S382000, C257S383000, C257S384000, C257S385000
Reexamination Certificate
active
07659160
ABSTRACT:
The present invention relates to an field effect transistor (FET) comprising an inverted source/drain metallic contact that has a lower portion located in a first, lower dielectric layer and an upper portion located in a second, upper dielectric layer. The lower portion of the inverted source/drain metallic contact has a larger cross-sectional area than the upper portion. Preferably, the lower portion of the inverted source/drain metallic contact has a cross-sectional area ranging from about 0.03 μm2to about 3.15 μm2, and such an inverted source/drain metallic contact is spaced apart from a gate electrode of the FET by a distance ranging from about 0.001 μm to about 5 μm.
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Belyansky Michael P.
Chidambarrao Dureseti
Clevenger Lawrence A.
Kumar Kaushik A.
Radens Carl
Abate Esq. Joseph P.
International Business Machines - Corporation
Scully , Scott, Murphy & Presser, P.C.
Singal Ankush K
Toledo Fernando L
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