Field effect transistor with a heterostructure and...

Details Field effect transistor with a heterostructure and... Field effect transistor with a heterostructure and...

2006-06-23

2009-02-17

Huynh, Andy (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S590000, C438S752000, C438S933000, C438S936000, C257S019000, C257S020000, C257S024000, C257S190000, C257S191000, C257S192000, C257S194000, C257S616000, C257SE29049, C257SE29056

Reexamination Certificate

active

07491612

ABSTRACT:
A field effect transistor with a heterostructure includes a strained monocrystalline semiconductor layer formed on a carrier material, which has a relaxed monocrystalline semiconductor layer made of a first semiconductor material (Si) as the topmost layer. The strained monocrystalline semiconductor layer has a semiconductor alloy (GexSi1-x), where the proportion x of a second semiconductor material can be set freely. Furthermore, a gate insulation layer and a gate layer are formed on the strained semiconductor layer. To define an undoped channel region, drain/source regions are formed laterally with respect to the gate layer at least in the strained semiconductor layer. The possibility of freely setting the Ge proportion x enables a threshold voltage to be set as desired, whereby modern logic semiconductor components can be realized.

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