Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-12-06
2005-12-06
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S268000
Reexamination Certificate
active
06972233
ABSTRACT:
A field effect transistor having a narrow channel and a method for forming such a device. An upstanding nanopillar is formed from a substrate by directional etching of the substrate preferentially masked by a nanoparticle. A stack of planar layers of material is formed adjacent and around the nanopillar. The bottom layer, adjacent the substantially planar top substrate surface, comprises insulating material. A conductive gate layer overlies the bottom layer while a second insulating layer overlies the gate layer. The pillar material is etched to leave a nanopore into which semiconductor material is deposited, forming an upstanding channel, after insulating material has been deposited on the interior of the nanopore. The source or drain may be a conductive substrate or a doped region of the substrate formed immediately beneath the nanopillar with the other electrode formed by doping the region adjacent the top of the channel.
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Dang Phuc T.
Hewlett--Packard Development Company, L.P.
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