Field-effect transistor and corresponding manufacturing method

Details Field-effect transistor and corresponding manufacturing method Field-effect transistor and corresponding manufacturing method

1999-11-18

2002-05-14

Bowers, Charles (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S276000, C438S298000, C257S213000, C257S327000

Reexamination Certificate

active

06387763

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an improved field effect transistor, and more specifically to a field effect transistor having a variable doping profile.
BACKGROUND
In particular but not exclusively, the invention relates to a field effect transistor which operates at high voltages, this transistor being formed on a semiconductor substrate and integrated with a well of N or P type and the description which follows is made with reference to this field of application with the only objective of simplifying the description.
As is well known, in the manufacturing of integrated circuit devices, in particular EEPROM memories, that need high internal programming voltages, the need comes up to integrate on the same chip transistors having low threshold voltage VT and low body factor.
A first known technical solution for manufacturing transistors with such features is that of reducing the doping of the substrate or, of the well in which these devices are formed. To this end “natural” transistors may be formed, that is without the use of additional doping implants on the semiconductor substrate where they are formed.
Although the technical problem is resolved, this first solution presents various drawbacks; in fact, in order to form these transistors with a low threshold voltage, it is necessary to introduce at least an additional mask in the standard process flows for the manufacture of the CMOS transistors. For instance, with the intention of masking the substrate portion where these transistors need to be formed.
Further on, to ensure the reliability of the parasitic field transistors that are formed between a portion of substrate in which these natural transistors are formed and a portion adjacent thereto, an insulating implant of P-iso (N-iso) type is usually formed on the entire active area, which requires a dedicated mask.
Associated with this kind of solution are further drawbacks such as: a large waste of area for guaranteeing a high enough threshold voltage of the parasitic transistor; and the threshold voltage of the “natural” transistors is determined by the doping of the substrate.
In advanced processes substrates with low doping (or epitaxial substrates) are used which result in threshold voltages of the “depletion” active transistor; the introduction of an additional mask is necessary for performing an insulating implant P distinct from the P-well implant (or for differentiating the doping of the N-well implant in which the p-channel transistors are formed).
To modify the threshold voltage of such natural transistors (for example in order to obtain V
T
>0) two possibilities are given: an implant dedicated to the correction of the threshold voltage, that however needs a further dedicated mask with the increase of the costs of manufacturing; ora blanket implant, that is without masking, to which, anyway, a reduction in the mobility of the complementary transistors (for example p-ch) is associated.
Further on, in some applications the use of more transistors is foreseen, with threshold voltages which differ of a small amount (for example A V
T
≈100 mV), which can be preferably defined according to the specific application (that is of the sub-circuit in which the transistor is inserted).
According to the prior art such result can be obtained by means of further implants for the adjustment of the threshold voltage of each transistor, each one requiring however a dedicated mask.
SUMMARY OF THE INVENTION
Embodiments of the invention include a field effect transistor having structural and functional features so as to free the threshold voltage from the process parameters by intervening only on the structure layout in such a way to overcome the limitations and the drawbacks that still limit the transistors manufactured according to the prior art.
Presented is a method of manufacturing a field effect transistor whose channel width is defined by a variable doping profile, which can be modified through changes in the layout of the structure. In order to obtain this variable doping profile, after the definition of the transistor active area, a mask is formed of greater width than the width of the active area; an external implant of doping is then carried out outside the transistor active area. Following the side diffusion of the doping due to thermal treatments, the doping profile along the width of the channel region of the transistor is modified and hence its threshold voltage.
The features and the advantages of the transistor according to the invention will become clear from the following description, of an embodiment thereof, which is herein given as example for illustrative and not limiting purposes with reference to the attached drawings.


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