Field effect transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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Details

C257S020000, C257S027000, C257S063000

Reexamination Certificate

active

07009200

ABSTRACT:
A field effect transistor comprises a source and a drain, and a channel layer of Si1-x-yGexCycrystal (1>x>0, 1>y≧0). Ge composition increases toward a drain end, in a vicinity of a source end of the channel layer.

REFERENCES:
patent: 5734181 (1998-03-01), Ohba et al.
patent: 6190975 (2001-02-01), Kubo et al.
patent: 2003/0201497 (2003-10-01), Inoue et al.
patent: 2002-076347 (2002-03-01), None
T. Tezuka et al., “Fabrication of Strained Si On An Ultrathin SiGe-on-Insulator Virtual Substrate With A High-Ge Fraction”, Applied Physics Letters, Sep. 17, 2001, vol. 79, pp. 1798-1800.
Qiqing Christine Ouyang et al., “Built-in Longitudinal Field Effects In Sub-100-nm Graded Si1-xGexChannel PMOSFETs”, IEEE Transactions On Electron Devices, Jun. 2001, vol. 48, No. 6, p. 1245-1250.
T. Tezuka et al., “Novel Fully-depleted SiGe-on-insulator pMOSFETs with High-mobility SiGe surface Channels”, Tech. Dig. IEDM ,Dec. 2001, p. 946-948.
T. Tezuka et al., “Semiconductor Device and Method of Manufacturing the same”, U.S. Appl. No. 10/029,022, filed Dec. 28, 2001.
T. Tezuka et al., “Integrated Circuit Device”, U.S. Appl. No. 10/188,824, filed Jul. 5, 2002.
U.S. Appl. No. 10/628,513, filed Jul. 29, 2003, to Tezuka et al.

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