Ferroelectric random access memory device with reference cell ar

Static information storage and retrieval – Read/write circuit – Differential sensing

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365145, G11C 1122

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active

059599227

ABSTRACT:
A ferroelectric random access memory device includes a plurality of reference cell array blocks implemented in a reference cell array. If the reference voltage from one of the reference cell array blocks is biased toward the voltage level of a logical data "1" or "0", another reference cell array block is chosen, which has ferroelectric capacitors of smaller or larger size than those of the selected reference cell array block. In this manner, the alternate reference cell array block provides the reference bit lines with required reference voltages. As a result, the sensing margin of the memory cells is increased, causing the reliability of the ferroelectric random access memory device to be improved.

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Koike et al., "A 60ns iMb Nonvolatile Ferroelectric Memory with Non-Driven Cell Plate Line Write/Read Scheme," ISSCC 96, Digest of Technical Paper, Session 23, DRAM, Paper SP23.1, pp. 473-475, Feb. 10, 1996.
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