Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-05-30
2006-05-30
Quach, T. N. (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S253000, C438S396000
Reexamination Certificate
active
07052951
ABSTRACT:
Ferroelectric memory devices and methods for fabricating such devices are provided. The ferroelectric memory device may comprise one or more interlayer dielectric layers on a semiconductor substrate, an oxygen-diffusion barrier pattern on the interlayer dielectric layer(s), and an upper insulating layer that is on the interlayer dielectric layer(s) that at least partially surrounds the oxygen-diffusion barrier pattern. These devices further include a capacitor that has a bottom electrode that is on the oxygen-diffusion barrier layer and on at least a portion of the upper insulating layer, a ferroelectric layer that is on the bottom electrode, and a top electrode that is on the ferroelectric layer. In some embodiments of the present invention, the top surface of the upper insulating layer is higher than the top surface of the oxygen-diffusion barrier pattern.
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Notice to File a Response/Amendment to the Examination Report dated Dec. 17, 2004 for corresponding KR application No. 2003-11099.
Office Action of corresponding Korean Application No. 10-22003-0011099 with cited references.
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