Ferroelectric memory device with merged-top plate structure...

Details Ferroelectric memory device with merged-top plate structure... Ferroelectric memory device with merged-top plate structure...

2005-07-05

2005-07-05

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S003000

Reexamination Certificate

active

06913967

ABSTRACT:
The inventive ferroelectric memory device includes: a semiconductor substrate providing elements of a transistor; a first inter-layer insulating layer formed on the semiconductor substrate; a storage node contact connected to elements of the transistor by passing through the first inter-layer insulating layer; a barrier layer contacting simultaneously to the storage node contact and the first inter-layer insulating layer; a lower electrode having a space for isolating the first inter-layer insulating layer and being formed on the barrier layer; a glue layer being formed on the first inter-layer insulating layer and encompassing lateral sides of the lower electrode as filling the space; a second inter-layer insulating layer exposing a surface of the lower electrode and encompassing the glue layer; a ferroelectric layer formed on the glue layer including the second inter-layer insulating layer; and an upper electrode formed on the ferroelectric layer.

REFERENCES:
patent: 5679969 (1997-10-01), Evans et al.
patent: 6638775 (2003-10-01), Kweon
patent: 6812089 (2004-11-01), Choi et al.

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