Ferroelectric capacitor memory device fabrication method

Details Ferroelectric capacitor memory device fabrication method Ferroelectric capacitor memory device fabrication method

2005-05-17

2005-05-17

Wilczewski, Mary (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S003000, C438S210000, C438S253000, C438S256000, C438S396000, C438S399000

Reexamination Certificate

active

06893912

ABSTRACT:
A ferroelectic capacitor memory device is fabricated by a forming a substrate including integrated circuitry with an interconnect layer and pass transistors. First capacitor electrodes, contacts and pads are simultaneously formed on the substrate and are connected to an associated pass transistor through the interconnect layer. A ferroelectic dielectric layer, formed on the first capacitor electrodes, is patterned to expose portions of one of the contacts and one of the pads to form a contact opening and a pad region. A second capacitor electrode is formed over the patterned ferroelectric layer to create a via within said contact opening, the via extending to one of the contacts. A conductive layer is formed upon the second capacitor electrode. The conductive layer is patterned to form a plate line, the via connecting one of the contacts to the plate line. The substrate forming step may be carried out so that the pass transistors comprise sources, drains and gates and the integrated circuitry comprises complementary metal oxide semiconductor (CMOS) circuitry comprising word lines, bit lines interconnect metal lines and contact plugs.

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