Feature control circuitry for testing integrated circuits

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S189110, C365S189120, C714S727000

Reexamination Certificate

active

11257861

ABSTRACT:
An integrated circuit is provided that includes testing circuitry for testing input-output circuits. The integrated circuit contains input-output circuits that each have associated input-output pins and input and output buffers. Each input-output circuit has associated features such as a weak pull-up feature, a voltage clamp diode feature, a bus hold feature, an open-drain feature, a differential input termination resistance feature, and a single-ended/differential mode selection feature. An input-output feature control register receives input-output circuit feature selection instructions. The feature selection instructions contain feature selection bits whose values determine which of the input-output circuit features are enabled in a set of input-output circuits for testing on the integrated circuit. The feature selection instructions can selectively enable one or more input-output circuit features in each input-output circuit. Different feature selection instructions can be loaded into the feature control register to systematically test the input-output circuit features.

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patent: 2006/0179373 (2006-08-01), Ishikawa

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