Fault tolerant integrated circuit architecture

Details Fault tolerant integrated circuit architecture Fault tolerant integrated circuit architecture

2007-06-21

2009-06-16

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Reliability

C326S010000, C326S039000

Reexamination Certificate

active

07548084

ABSTRACT:
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation.

REFERENCES:
patent: 2004/0071142 (2004-04-01), Moriwaki et al.

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