Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-04-21
1999-08-03
Tu, Trinh L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714724, 395500, G01R 3128, G06F 300
Patent
active
059319631
ABSTRACT:
A fault simulation apparatus includes an MOS transistor output signal strength determining portion for extracting the conductivity type of an MOS transistor in which an event such as a variation in signal level occurs. A control signal value is obtained from a control terminal, and an input signal value is obtained from an input terminal, and output signal strength when the event occurring MOS transistor is turned ON is determined. In the apparatus, fault simulation is performed depending upon the output signal strength determined by the output signal strength determining portion.
REFERENCES:
patent: 5345401 (1994-09-01), Tani
patent: 5701254 (1997-12-01), Tani
patent: 5719881 (1998-02-01), Yonetoku
Mitsubishi Denki & Kabushiki Kaisha
Mitsubishi Electric Semiconductor Software Co. Ltd.
Tu Trinh L.
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