Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-12-19
2010-11-02
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S040000, C714S042000, C714S703000
Reexamination Certificate
active
07827445
ABSTRACT:
Fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’) including establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.
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Foster, Sr. Jimmy G.
Gruendler Nickolaus J.
Michelich Suzanne M.
Taylor Jacques B.
Baderman Scott T
Biggers & Chanian, LLP
International Business Machines - Corporation
Lenart Edward J.
Schell Joseph
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