Fast invalidation for cache coherency in distributed shared...

Details Fast invalidation for cache coherency in distributed shared... Fast invalidation for cache coherency in distributed shared...

2007-01-29

2009-11-03

Portka, Gary J (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C709S214000, C711S141000

Reexamination Certificate

active

07613882

ABSTRACT:
An example embodiment of the present invention provides processes relating to a cache coherence protocol for distributed shared memory. In one process, a DSM-management chip receives a request to modify a block of memory stored on a node that includes the chip and one or more CPUs, which request is marked for fast invalidation and comes from one of the CPUs. The DSM-management chip sends probes, also marked for fast invalidation, to DSM-management chips on other nodes where the block of memory is cached and responds to the original probe, allowing the requested modification to proceed without waiting for responses from the probes. Then the DSM-management chip delays for a pre-determined time period before incrementing the value of a serial counter which operates in connection with another serial counter to prevent data from leaving the node's CPUs over the network until responses to the probes have been received.

REFERENCES:
patent: 5706463 (1998-01-01), Ebrahim
patent: 6490661 (2002-12-01), Keller
patent: 7107408 (2006-09-01), Glasco
patent: 7360069 (2008-04-01), Steely et al.
patent: 7366847 (2008-04-01), Kruckemyer et al.
patent: 7389389 (2008-06-01), Gharachorloo et al.
patent: 1008940 (2000-06-01), None
Acacio, M.E., J. Gonzalez, J.M. Garca and J. Duato, “Owner Prediction for Accelerating Cache-to-Cache Transfer Misses in a cc-NUMA Architecture”, 0-7695-1524-X/02, IEEE 2002, 12 pages.
Brock, B.C. et al., “Experience with Building a Commodity Intel-based ccNUMA System”, IBM Journal of Research and Development, vol. 45, No. 2 (2001).

Affiliated with

Also associated with

Rating

Fast invalidation for cache coherency in distributed shared... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fast invalidation for cache coherency in distributed shared..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast invalidation for cache coherency in distributed shared... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4132092