Failure-data storage system

Details Failure-data storage system Failure-data storage system

1998-02-25

2000-04-11

De Cady, Albert

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

714724, 714 42, G06F 1100

Patent

active

060498986

ABSTRACT:
A failure-data storage system is disclosed which is able to prepare data accumulated from a multiple data bit device test. Failure-data from the memory tester 1 is, before being stored in memory IC 6, logically added to one previous cycle failure-data with the same address by OR gate 12, and the result is input to F/F 13. The output of the F/F 13 is input to memory IC 6 when 3 state buffer 14 is in an enabled state and is fed back to the OR gate 12. Furthermore, each of the data bit of memory IC has data controller 10-1, 10-2, 10-3, and 10-4 as explained above.

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