Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-05-07
1998-12-22
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438770, H01L 21336, H01L 2131
Patent
active
058518924
ABSTRACT:
A semiconductor structure is provided having an improved oxide with minimal irregularities and charge trap densities. The oxide is formed by an oxidation process which controls temperature and ambient conditions during oxidation as well as prior to and after oxidation. The ambient conditions are chosen such that the silicon surface is more receptive to growing a high quality, relatively thin oxide. A post-oxidation anneal helps ensure any irregularities, dislocations, contaminants involved in trap formation are minimized after the oxide is grown. A post-oxidation anneal involving oxygen incorporated into the oxide is presumed to help minimize any defects which might result from the pre-existing oxidation cycle. A slow ramping of temperature and close control of that temperature helps minimize trap locations at or near the silicon surface on which oxide will be grown. The combination of pre- and post-oxidation anneal, the ambient chosen, and various cleaning(g steps prior to oxidation helps ensure a high quality gate or tunnel oxide of relatively thin dimension.
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Lojek Bohumil
McRae Joseph M.
Cypress Semiconductor Corp.
Daffer Kevin L.
Lebentritt Michael S.
Niebling John F.
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