Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-02-12
1999-12-21
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438241, 438257, H01L 218234
Patent
active
060048417
ABSTRACT:
A process has been developed in which a capacitor structure can be simultaneously fabricated with NFET and PFET devices, to be used in EEPROM, SRAM or DRAM cells. The process features the use of a silicon nitride layer, protecting an underlying capacitor dielectric layer from an oxidation ambient, presented during a subsequent NFET source and drain drive-in procedure.
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Chang Tzong-Sheng
Chou Chen-Cheng
Ackerman Stephen B.
Chang Joni
Saile George O.
Taiwan Semiconductor Manufacturing Company
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