Fabrication process for MOSFET devices and a reproducible capaci

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438241, 438257, H01L 218234

Patent

active

060048417

ABSTRACT:
A process has been developed in which a capacitor structure can be simultaneously fabricated with NFET and PFET devices, to be used in EEPROM, SRAM or DRAM cells. The process features the use of a silicon nitride layer, protecting an underlying capacitor dielectric layer from an oxidation ambient, presented during a subsequent NFET source and drain drive-in procedure.

REFERENCES:
patent: 5187636 (1993-02-01), Nakao
patent: 5286991 (1994-02-01), Hui et al.
patent: 5364804 (1994-11-01), Ho et al.
patent: 5376593 (1994-12-01), Sandhu et al.
patent: 5401678 (1995-03-01), Jeong et al.
patent: 5547893 (1996-08-01), Sung
patent: 5633181 (1997-05-01), Hayashi
patent: 5747369 (1998-05-01), Kantimahanti et al.
patent: 5766992 (1998-06-01), Chou et al.
patent: 5866451 (1999-02-01), Yoo et al.

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