Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-05-31
2002-05-21
Le, Vu A. (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S212000, C438S224000, C438S228000, C438S306000, C438S526000, C438S527000
Reexamination Certificate
active
06391723
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to field effect transistors, and, more particularly, to a vertical double-diffused metal oxide semiconductor (VDMOS) device.
BACKGROUND OF THE INVENTION
A VDMOS integrated structure includes source, body and drain regions of alternate type conductivity defined in a semiconductor electrically in series with each other. The body region is a diffused region that extends into the semiconductor while the source and drain regions are disposed near the surface of the semiconductor to define a certain length and width of a channel region in the body region. An insulated gate electrode is formed on the surface of the semiconductor, geometrically above the channel region.
In operation, by applying an appropriate voltage on the gate electrode, the type of conductivity of the diffused body region in the portion defined as the channel region, between the source and drain regions and directly underneath the gate electrode, is inverted. This forms a superficial channel in a depleted channel region.
The inverted channel allows a current flow between the source region formed inside the body region and the drain region of the device, which commonly surrounds the body region and which may be contacted on the bottom face of the semiconductor wafer. A typical VDMOS structure is described in U.S. Pat. No. 4,145,700.
The structure formed by the distinct regions of the source, body and drain of a VDMOS device in the semiconductor substrate determines the existence of either an NPN or PNP parasitic bipolar junction transistor. This depends on the respective types of conductivity of the regions of the VDMOS transistor structure.
The inevitable presence of this parasitic bipolar transistor structure is detrimental for important electrical characteristics of the VDMOS structure, and its effect must be minimized. Many ways have been proposed to reduce as much as possible the gain of such a parasitic bipolar transistor.
There are substantially two types of known techniques for reducing the gain of the parasitic bipolar transistor. A first approach short circuits the base and the emitter of the parasitic transistor with the metal that contacts and connects the source region of the VDMOS structure. A second and most commonly followed approach increases as much as possible the doping level of the base region of the parasitic transistor, represented by the body region of the VDMOS structure.
Although the latter approach is easy to implement in a normal manufacturing process for a VDMOS structure, it contrasts with the objective of maintaining a voltage threshold of the VDMOS between 1 and 5 volts. This imposes that the dopant concentration in the body region be kept between about 10
16
and 10
17
atoms/cm
3
. This is definitely insufficient to effectively lower the gain of the parasitic bipolar transistor.
These contrasting requirements and incompatibilities are generally overcome by forming a body region which is not homogeneous, but is in the form of two layers or diffused regions formed independently from one another. A first zone of the body region establishes the concentration of dopant in the superficial channel region, and thereby the turn-on threshold voltage. The other zone of the body region has a relatively higher dopant concentration to provide for a base region of the parasitic transistor with a high dopant concentration to significantly reduce its gain.
These two zones of the body region with a different dopant concentration are made by two distinct dopant implants. For instance, a dose of about 10
13
atoms/cm
2
is made for the implantation that determines the turn-on threshold voltage of the device. An increased implant dose of about 10
15
atoms/cm
2
or greater is made to increase the dopant concentration in the zone that forms the base region of the parasitic transistor.
Commonly, this differentiation of the dopant level of the body region is made possible by either using two distinct masks, or by other additional processing steps. This increases the complexity of the fabrication process.
FIGS. 1
a
to
1
e
schematically illustrate the basic steps of a prior art process for realizing a so-called deep body region having an increased dopant concentration to decrease the gain of the parasitic structure.
According to this known process, through a purposely reduced aperture of a mask M
1
a first implantation is carried out. Mask M
1
is typically formed by a patterned layer of silicon oxide with a thickness generally between 1 to 2 mm. In the considered example, the implanted dopant B is boron. The implant is generally made at 60 to 100 KeV, with a dose generally between 5*10
14
and 5*10
15
atoms/cm
2
. This heavy implantation carried out through the relatively reduced mask aperture prevents a subsequent lateral diffusion of the implanted dopant, which may reach the channel region. This would increase the threshold voltage of the device.
A second body implantation is performed after having grown a gate oxide layer
3
on the n type epitaxial semiconductor grown over the n+ type semiconductor substrate. This is a reduced dose of boron implantation, generally between 10
13
to 10
14
atoms/cm
2
, at 80 to 100 KeV. This implantation forms the superficial p-type body region in which the channel region of the structure is established. This ensures the desired turn-on threshold voltage of the device. This second shallower body implantation takes place through an aperture defined in a polysilicon layer
4
which will form the gate electrode of the device.
As shown in
FIG. 1
c
, the dopant implant in the two distinct steps is diffused in the semiconductor, producing the characteristic profile of the body diffusion. Thereafter, the layer of the gate oxide is removed by masking and etching steps, and the n+ type source implant is carried out as depicted in
FIG. 1
d.
FIG. 1
e
shows the details of the structure after the deposition of an insulating dielectric layer
5
, the opening of a via exposing the source contact zone, and the deposition of a metal layer
6
.
FIG. 1
f
shows the doping characteristic profile across a section of the epitaxial layer
2
.
The set of
FIGS. 2
a-
2
g
schematically shows another known prior art process that does not use the so-called deep body. This method includes realizing a buried body region (shallow body) having a high dopant concentration as described in U.S. Pat. No. 4,587,713.
According to this alternative technique, through the opening defined in the polysilicon layer
4
, a first boron implantation of a moderate dose is carried out to ensure the desired turn-on threshold voltage of the device, as shown in
FIG. 2
a
. This is followed by the dopant diffusion as depicted in
FIG. 2
b.
Thereafter, through a second photoresist mask R, a second boron implantation is performed at relatively high kinetic energies of about 150 to 500 keV, and in a dose sufficient to form a p+ type region with a relatively high doping level at a certain depth and within the p-type body diffusion already formed. The concentration peak of this p+ type region, often referred to as shallow body, should be located beneath the future source zone. This is realized by using an appropriate implantation energy. This step is schematically illustrated in
FIG. 2
c.
The fabrication process continues, similarly to the preceding case, with the masking and etching of the gate oxide layer
3
in the source zone, and with the n+ type source implant directly above the previously formed heavily doped p+ region (shallow body), as shown in
FIG. 2
d
.
FIG. 2
e
is a schematic cross section of the complete functional structure, and
FIGS. 2
f
and
2
g
respectively show the doping characteristic profiles along a section crossing the source region and along a section not crossing the source region.
A second masking stage becomes necessary because if the high energy implant should be subjected to the annealing treatment of the body region, there would be a lateral diffusion of the dopant, and an expansion of the high
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Jorgenson Lisa K.
Le Vu A.
Pyonin Adam
STMicroelectronics S.r.L.
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