Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-09-17
2001-07-17
Zarablan, Amir (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S660000, C438S682000
Reexamination Certificate
active
06261938
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a structure of etch-resistant metal/semiconductor compound using resistless electron beam lithography, more specifically a highly focused electron beam to produce a sub-micron structure of etch-resistant metal/semiconductor compound.
2. Brief Description of the Prior Art
The fabrication of ultra-small scale electronic devices requires efficient high resolution lithography techniques. Resist-based lithography processes are very frequently involved in these high resolution lithography techniques, and poly(methyl methacrylate) (PMMA) is the polymer most widely used as a resist for electron beam lithography applications (S. P. Beaumont, P. G. Bower, T. Tamamura, C. D. W. Wilkinson,
Appl. Phys. Lett.,
38, 438 (1991) and W. Chen, H. Ohmed,
J. Vac. Sci. Technol.,
B 11, 2519 (1993)).
These types of lithographic processes suffer from several limitations which can become extremely constraining in the fabrication of sub-100 nm devices. These limitations include undesirable proximity effects in the resist and resolution limits imposed by the size of the polymer molecules. Proximity effects are produced when the exposed patterns are situated within the range of backscattered electrons. These electrons are primary electrons which collide with the substrate with a great angle to escape from the surface with a high energy in an area which may be considerably larger than the electron beam diameter. These high energy electrons expose the resist in an undesirable region. Current research efforts in lithography techniques include several resistless processes for defining patterns (see for example D. Wang, P. C. Hoyle, J. R. A. Cleaver, G. A. Porkolab, N. C. MacDonald,
J. Vac. Sci. Technol.,
B 13, 1984 (1995) for electron beams; and H. Sugimura and N. Nakagiri,
J. Vac. Sci. Technol.,
B 13, 1933 (1995) for a scanning probe technique).
The formation of a silicide layer is usually carried out by annealing samples of thin metal layers on silicon substrates in a conventional furnace with a controlled atmosphere of N
2
-H
2
. This annealing technique requires several minutes to convert the metal film into silicide (see C. A. Chang,
J. Appl. Phys.,
58, 3258 (1985); C. A. Chang and A. Segmuller,
J. Appl. Phys.,
61, 201 (1987); C. A Chang and W. K. Chu,
Appl. Phys. Lett.,
37, 3258 (1980); and C. A. Chang and J. M. Poate,
Appl. Phys. Let.,
36, 417 (1980)).
New techniques involving Rapid Thermal Annealing (RTA) improve the process of the formation of silicide. RTA silicide films are significantly better than those formed by conventional annealing (C. A Dimitriadis,
Appl. Phys. Lett.,
56, 143 (1990)), due to a shorter processing time (A. Torres, S. Kolodinski, R. A. Donaton, K. Roussel and H. Bender,
SPIE,
2554, 185 (1995)).
More recently, several techniques of formation of silicide have been developed. These processes involve heating of metal-silicon interfaces using photons, electrons and ion beams (J. M. Poate and J. W. Mayer,
Laser Annealing of Semiconductor,
Academic Press, New York, 1982; J. Narayan, W. L. Brown and R. A. Lemons,
Laser
-
Solids Interactions and Transient Processing of Materials,
North-Holland, N.Y., 1983; and E. D'Anna, G. Leggieri and A. Luches,
Thin Solids Films,
129, 93 (1985)). All these processes are based on the concept of forming silicide with localized heating near the surface. However, none of these techniques are intended as lithography processes or for the fabrication of masks for lithography.
Ultra-violet (UV) lithography is the technique used in large scale production of devices and circuits. However, the wavelength of ultra-violet light represents a physical limit to the resolution that can be achieved using this technique. Alternative techniques are being evaluated to replace UV lithography for industrial production of electronic devices and circuits. One of these techniques is X-ray lithography, since X-rays have a much smaller wavelength than UV. In this technique, regions of a mask placed between the X-ray source and the sample are covered by a layer of heavy atoms (such as Ta, W and tantalum suicides) which absorbs X-rays (J. Canning,
Journal of Vacuum Science and Technology,
B15, 2109 (1997)). Such masks are fabricated using electron-beam lithography. A major challenge in the fabrication of these masks is to use electron-beam lithography to form structures (etch masks) that have both a high resolution and an excellent resistance to chemicals employed to remove the absorbent layer of heavy atoms in unprotected regions. Conventional techniques using polymeric resists as etch masks either do not provide a sufficient resolution or do not provide a sufficient resistance to chemical etching (J. P. Silverman,
Journal of Vacuum Science and Technology,
B15, 2117 (1997)).
OBJECTS OF THE INVENTION
An object of the present invention is therefore to overcome the above described drawbacks of the prior art.
Another object of the invention is to provide a method involving a direct write resistless lithography technique to produce a structure of etch-resistant metal/semiconductor compound on a substrate of semiconductor material with achievable linewidths below 50 nm.
A further object of the invention is to provide a direct write resistless lithography method capable of fabricating masks for X-ray lithography.
A still further object of the invention is to provide a direct write resistless lithography method for fabricating molds usable for nanoimprint lithography.
SUMMARY OF THE INVENTION
Generally, the present invention relates to a method for fabricating a structure of etch-resistant metal/semiconductor compound on a substrate of semiconductor material, comprising the steps of depositing onto the substrate a layer of metal capable of reacting with the semiconductor material to form etch-resistant metal/semiconductor compound, producing a focused electron beam, applying the focused electron beam to the layer of metal to locally heat the metal and semiconductor material and cause diffusion of the metal and semiconductor material in each other to form etch-resistant metal/semiconductor compound, displacing the focused electron beam onto the layer of metal to form the structure of etch-resistant metal/semiconductor compound, and wet etching the layer of metal to leave on the substrate of semiconductor material only the structure of etch-resistant metal/semiconductor compound.
The use of a focused electron beam in a resistless lithography method enables the production of a structure of etch-resistant metal/semiconductor compound having linewidths as thin as 50 nm.
The semiconductor material may be selected from the group consisting of silicon and gallium arsenide, and the metal may be selected from the group consisting of cobalt, chrome, hafnium, iridium, manganese, nickel, palladium, platinum, rhodium, tantalum, titanium, tungsten, zirconium.
Preferably, each portion of the structure of etch-resistant metal/semiconductor compound is exposed to the focused electron beam a plurality of times to achieve finer linewidths.
In accordance with a preferred embodiment of the present invention, the etch-resistant metal/semiconductor compound is formed by silicide and the substrate of semiconductor material is a silicon substrate.
Following the step of wet etching the layer of metal, an oxygen plasma etch can be conducted to remove a carbon deposit formed at the surface of the silicide structure. After the step of wet etching the layer of metal, the silicon substrate may also be wet etched to remove a thin layer of metal rich silicon formed at the surface of the silicon substrate by reaction, at room temperature, of the metal and silicon with each other.
The present invention also relates to a method for fabricating a structure of etch-resistant metal/semiconductor compound on a substrate, comprising the steps of depositing onto the substrate a layer of semiconductor material, depositing onto the layer of semiconductor material a layer of metal capabl
Beauvais Jacques
Drouin Dominique
Lavallee Eric
Lebentritt Michael S.
Quantiscript Inc.
Quarles & Brady LLP
Zarablan Amir
LandOfFree
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