Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-01-16
1999-07-13
Booth, Richard A.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438291, H01L 218247
Patent
active
059239751
ABSTRACT:
In a fabrication process of a nonvolatile memory device, natural or low threshold transistors usable in the peripheral circuitry are economically fabricated by exploiting the MATRIX mask that is commonly used for patterning the interpoly dielectric layer for defining the channel length of the natural transistors by patterning the interpoly dielectric layer also over the channel area of the natural transistor, outside the matrix area. The so predefined interpoly dielectric is thereafter exploited as a mask of the polysilicon of a first level during the patterning step of the polysilicon of a second level. Electrical continuity between the polysilicon of the second level and the so patterned gate of polysilicon of the first level are established over the field oxide adjacent to the active area of the natural transistor.
REFERENCES:
patent: 4766088 (1988-08-01), Kono et al.
patent: 5480821 (1996-01-01), Chang
patent: 5554551 (1996-09-01), Hong
patent: 5656527 (1997-08-01), Choi et al.
patent: 5789293 (1998-08-01), Cho et al.
patent: 5789294 (1998-08-01), Choi
Booth Richard A.
SGS--Thomson Microelectronics S.r.l.
LandOfFree
Fabrication of natural transistors in a nonvolatile memory proce does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fabrication of natural transistors in a nonvolatile memory proce, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication of natural transistors in a nonvolatile memory proce will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2287405