Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1998-12-17
2001-01-23
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S785000, C438S396000, C438S907000
Reexamination Certificate
active
06177305
ABSTRACT:
BACKGROUND
The present invention relates generally to device fabrication and, in particular, to the fabrication of metal-insulator-metal (MIM) capacitive structures.
Various capacitive structures are used as electronic elements in integrated circuits. Such structures include, for example, metal-oxide-semiconductor (MOS) capacitors, p-n junction capacitors and metal-insulator-metal (MIM) capacitors. For some applications, MIM capacitors can provide certain advantages over MOS and p-n junction capacitors because the frequency characteristics of MOS and p-n junction capacitors may be restricted as a result of depletion layers that form in the semiconductor electrodes. An MIM capacitor can exhibit improved frequency and temperature characteristics. Furthermore, MIM capacitors are formed in the metal interconnect layers, thereby reducing CMOS transistor process integration interactions or complications. Additionally, the topology of the MIM capacitor simplifies planarization processes.
A MIM capacitor includes an insulating layer, such as a dielectric, disposed between lower and upper electrodes. Typically, after formation of the lower MIM capacitor electrode in a first chamber, the wafer is transferred to another chamber or furnace where the insulating layer is deposited. The wafer subsequently is returned to the first chamber or yet a third chamber for deposition of the upper electrode. Titanium nitride (TiN) is sometimes used as the material for the capacitor electrodes.
One difficulty that is encountered during such a fabrication process results from the exposure of the wafer to an ambient containing oxygen when the wafer is transferred from the first chamber to another chamber or furnace for deposition of the insulating layer. As a result of exposure to the oxygen, a thin porous metal oxide film forms on the upper surface of the lower TiN electrode. The presence of the thin porous metal oxide film at the interface between the TiN and insulating layer can allow charge to become fixed or trapped at the interface. Moreover, if the porous metal oxide film is present only at the interface of one electrode, the capacitive structure can exhibit undesired hysteresis affects as the capacitor charges and discharges. Accordingly, improvements in the fabrication of MIM capacitive structures are desirable.
SUMMARY
In general, the invention relates to techniques for fabricating an MIM or similar capacitive structure by chemical vapor deposition (CVD) to help improve the electrical and other properties of the capacitor.
According to one aspect, a method of fabricating a capacitive structure includes depositing a first titanium nitride electrode layer on a wafer by CVD and subsequently depositing an insulating layer on the first electrode by CVD without exposing the first titanium nitride electrode to atmosphere. A second titanium nitride electrode layer then is deposited on the insulating layer by CVD. In some implementations, the insulating layer comprises a material selected from the group consisting of a titanium oxynitride material, a titanium oxycarbonitride material, a titanium oxide material and a silicon oxide material.
According to another aspect, the various layers of the capacitive structure, including the insulating layer, are deposited in situ in a single CVD chamber.
Various embodiments include one or more of the following features. Forming the first and second electrode layers and forming the insulating layer can include providing a gas comprising titanium to an interior of the CVD chamber by heating a metal organic precursor including titanium. Additionally, one or more reactant gases can be provided to the chamber interior to the vicinity of a heated wafer.
The relative amounts of the gases flowing into the chamber interior during formation of the insulating layer can be controlled to establish the stoichiometry of the insulating layer. For example, in some implementations, the insulating layer can comprise a titanium oxide material having the formula TiO
x
, where x can range from about 1 to about 2. In other embodiments, the insulating layer comprises a titanium oxynitride material having the formula TiO
x
N
y
, where the sum of x and y is equal to about 1, and the value of x is at least as high as about 0.5. Alternatively, the insulating layer can comprise a titanium oxycarbonitride material having the formula TiO
x
N
y
C
z
, where the sum of x, y and z is equal to about 1, and the value of x is at least as high as about 0.3. Alternatively, the insulating layer can comprise a silicon oxide material having the formula SiO
x
where x can range from about 1 to about 3.
In some embodiments, the relative amounts of the gases flowing into the chamber interior are varied during formation of the insulating to form multiple insulating sub-layers of different stoichiometry. Also, RF generators can be used with one or more gases to densify the metal electrodes or the insulating layer.
In yet another implementation, a method of fabricating a capacitive structure includes forming three electrodes with an insulating layer provided between pairs of electrodes. The lower electrode can be connected electrically to an active region of a transistor, and the middle electrode can serve as a floating electrode. Each of the electrodes and insulating layers can be formed by a CVD process.
Various implementations include one or more of the following advantages. Since the insulating layer is formed without exposing the TiN layer to the atmosphere, formation of a porous metal oxide film at the interface of the lower electrode and the insulating layer can be avoided. Additionally, the foregoing techniques can provide greater control over the stoichiometry and thickness of the insulating layer. The dielectric constant and, therefore, the capacitance, of the resulting insulator can be controlled more precisely to allow better control of the electrical response. Moreover, the CVD process allows the MIM structure to be formed on a flat topology or a more complicated topology.
Furthermore, forming the insulating layer of the MIM structure in situ allows the fabrication process to be performed more quickly, thereby increasing the overall throughput of the fabrication system. Specifically, obviating the need to transfer the wafer among different chamber during formation of the capacitive structure can reduce the overall fabrication time. Additionally, in situ deposition also can reduce defects caused by increased handling of the device, thereby providing higher production yields.
Other features and advantages will be readily apparent from the following detailed description, the accompanying drawings and the claims.
REFERENCES:
patent: 5449954 (1995-09-01), Ito
patent: 5480684 (1996-01-01), Sandhu
patent: 5541454 (1996-07-01), Inoue et al.
patent: 5661319 (1997-08-01), Fujii et al.
patent: 5663088 (1997-09-01), Sandhu et al.
patent: 5672385 (1997-09-01), Jimba et al.
patent: 5717250 (1998-02-01), Schuele et al.
patent: 5729054 (1998-03-01), Summerfelt et al.
patent: 5741721 (1998-04-01), Stevens
patent: 5895239 (1999-04-01), Jeng et al.
patent: 5903023 (1999-05-01), Hoshi
patent: 5906866 (1999-05-01), Webb
patent: 5964947 (1999-10-01), Zhao et al.
patent: 6103567 (2000-08-01), Shih
Applied Materials. Products and Services. MDP: Metal Deposition Product Business Group; Internet http://www.appliedmaterials.com/products/mdp/htm (Oct. 27, 1998).
Allman Derryl D. J.
Chiesl Newell E.
Hornback Verne C.
Goodwin David
LSI Logic Corporation
Wilczewski Mary
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