Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2010-10-01
2011-10-11
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21585
Reexamination Certificate
active
08034679
ABSTRACT:
An insulated-gate field-effect transistor (100, 100V,140, 150, 150V,160, 170, 170V,180, 180V,190,210, 210W,220, 220U,220V,220W,380,or480) is fabricated so as to have a hypoabrupt vertical dopant profile below one (104or264) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone, normally serving as the drain, and adjoining body material (108or268). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material increases by at least a factor of10in moving from that source/drain zone down to an underlying body-material location no more than10times deeper below the upper semiconductor surface than that source/drain zone. The body material is preferably provided with a more heavily doped pocket portion (120or280) situated along the other source/drain zone (102or262) normally serving as the source.
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Le Thao P.
Meetin Ronald J.
National Semiconductor Corporation
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