Fabrication of bipolar/CMOS integrated circuits

Details Fabrication of bipolar/CMOS integrated circuits Fabrication of bipolar/CMOS integrated circuits

1997-11-13

1999-09-14

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438202, 438203, 438204, H01L 218238

Patent

active

059536004

ABSTRACT:
The present invention relates to a method for fabricating an integrated circuit including complementary MOS transistors and a bipolar transistor of NPN type, including the steps of: forming MOS transistors in an epitaxial layer, coating the entire structure with a double protection layer, forming in an opening of this double layer the emitter-base of the bipolar transistor, a specific collector diffusion being formed in the epitaxial layer under the emitter-base region, and reopening the double protection layer at the locations where it is desired to perform silicidations.

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French Search Report from French Patent application 96 14412, filed Nov. 19, 1996.

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