Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-04-05
2005-04-05
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S204000, C438S217000
Reexamination Certificate
active
06875648
ABSTRACT:
An EEPROM memory cell uses an emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage of the wells. The wells are fabricated to be approximately 100 nm (0.1 micrometers (μm)) in depth with a breakdown voltage of approximately 14 volts or more. A typical breakdown voltage of a well in a bipolar process is approximately 10 volts. Due to the increased breakdown voltage achieved, EEPROM memory cells can be produced along with bipolar devices on a single integrated circuit chip and fabricated on a common semiconductor fabrication line.
REFERENCES:
patent: 20040051147 (2004-03-01), Panday et al.
Atmel Corporation
Schneck Thomas
Schneck & Schneck
Tsai H. Jey
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