Fabrication method of semiconductor device with MOSFET and capac

Details Fabrication method of semiconductor device with MOSFET and capac Fabrication method of semiconductor device with MOSFET and capac

1997-01-09

1998-09-29

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438251, H01L 2170, H01L 2700

Patent

active

058145427

ABSTRACT:
A fabrication method of a semiconductor device that makes it possible to reduce the number of necessary process steps. After an insulating layer is formed on a semiconductor substructure, a polysilicon layer is formed on the insulating layer. Then, dopant atoms are implanted into the polysilicon layer so that the peak depth of the distribution of the implanted dopant atoms is located at approximately the middle level of the polysilicon layer. The implanted polysilicon layer is subjected to a heat-treatment to thereby form a dielectric region at the middle level of the polysilicon layer due to reaction of the implanted dopant atoms with silicon atoms existing in the polysilicon layer. The remaining lower and upper parts of the polysilicon layer form lower and upper polysilicon regions, respectively. Subsequently, the implanted and heat-treated polysilicon layer is patterned to have a predetermined shape. As the dopant atom to be implanted, oxygen (O) and/or nitrogen (N) is preferably used. The dielectric region is made of SiO.sub.x for oxygen only, of SiN.sub.x for nitrogen only, and of SiNO.sub.x for the combination of oxygen and nitrogen, where 0<x<1.

REFERENCES:
patent: 5429972 (1995-07-01), Anjum et al.
patent: 5610094 (1997-03-01), Ozaki et al.

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