Fabrication method of lateral double diffused MOS transistors

Details Fabrication method of lateral double diffused MOS transistors Fabrication method of lateral double diffused MOS transistors

1998-08-18

2000-07-11

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438286, 438297, 438276, H01L 21336

Patent

active

060872322

ABSTRACT:
According to a method for manufacturing double RESURF (reduced SURface Field) LDMOS (Lateral Diffused Metal Oxide Semiconductor) transistors, on-resistance of double RESURF LDMOS transistors has been improved by using a new tapered p top layer on the surface of the drift region of the transistor, thereby decreasing the length of the drift region. Another advantage of the current invention is that the breakdown voltage similar with the on-resistance can be improved by using a reproducible tapered TEOS oxide by use of a multi-layer structure and low temperature annealing process. This is due to the reducing of the current path and impurity segregation in the drift region by using the tapered TEOS oxide instead of LOCOS filed oxide.

REFERENCES:
patent: 5346835 (1994-09-01), Malhi et al.
patent: 5508547 (1996-04-01), Yang
patent: 5512495 (1996-04-01), Mei et al.
patent: 5548147 (1996-08-01), Mei
patent: 5585294 (1996-12-01), Smayling et al.
patent: 5585660 (1996-12-01), Mei
Double RESURF Device Technology for Power ICs; Yukimasa Koishikawa; Mitsuasa Takahashi; Hiroshi Yanagigawa and Toshihide Kuriyama; 1994; pp. 438-443.
Novel Silicon-on-Insulator Mosfet for High-Voltage Integrated Circuits; K.A. Fesler; B.Y. Kim; H.J. Shaw; 1989; pp. 536-537.
Novel High-Voltage Silicon-on-Insulator Mosfets; Qin Lu, P. Ratnam and C. Andre T. Salama; 1992; pp. 1745-1750.
Optimized 25V, 0.34m.OMEGA..multidot.cm.sup.2 Very-Thin-RESURF(VTR), Drain Extended IGFETs in a Compressed BiCMOS Process; Chin-Yu Tsai, John Arch, Taylor Efland, John Erdeljac, Lou Hutter, Jozef Mitros, Jau-Yuann Yang and Han-Tzong Yuan; 1996; pp. 18.2.1-18.2.4.
An Optimized RESURF LDMOS Power Device Module Compatible with Advanced Logic Processes; Taylor Efland, Satwinder Malhi, Wayne Bailey, Oh Kyong Kwon, Wai Tung Ng, Manolo Torreno and Steve Keller; 1992; pp. 9.4.1-9.4.4.
A Resurfed High-Voltage NMOS Device Fully Compatible With A Low-Voltage 0.8.mu.m BiCMOS Technology; Yong Qiang Li, C. Andre T. Salama, Mike Seufert, Peter Schvan and Mike King; 1996; pp. 571-576.
Thin Layer High-Voltage Devices (Resurf Devices); J.A. Appels, M.G. Collet, P.A.H. Hart, H.M.J. Vaes and J.F.C.M. Verhoeven; 1980; pp. 1-13.

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