Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-01-07
2004-06-08
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C438S299000, C438S286000, C438S305000, C438S266000, C438S594000
Reexamination Certificate
active
06746920
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a fabrication method of a flash memory device, and more particularly relates to a fabrication method of the flash memory device having a L-shaped ploy spacer as a floating gate.
2. Description of the Prior Art
Accordingly, in the prior flash memory manufacture process, a spacer structure is usually formed on the semiconductor substrate and then the spacer structure is used to define the channel length. However, the prior fabrication method has difficult of controlling the spacer profile so as not to precisely control the implanted position of the source and the drain to cause the disadvantage of difficult of controlling the channel length.
On the other hand, in the conventional flash memory technology, the spacer could be also used as a floating gate, such as the U.S. Pat. No. 5,427,968 disclosed a fabrication method of split-gate flash memory cell with separated and self-aligned tunneling regions, referring to the
FIG. 1A
,
FIG. 1B
,
FIG. 1C
, and
FIG. 1D. A
semiconductor substrate
10
is provided and a gate oxide layer
12
and a silicon nitride layer
14
are formed on a surface of the semiconductor substrate
10
, such as shown in the FIG.
1
A. Using lithography technology defines a silicon nitride block
14
and removes the exposed portion of the gate oxide layer
12
. A tunneling layer
16
and a floating gate
18
are sequentially formed on the semiconductor substrate
10
. Utilizing a anisotropic etching technology forms a floating gate
18
of a ring-shaped poly spacer structure surrounding the silicon nitride block
14
, such as shown in the
FIG. 1B. A
source
20
and a drain
22
are formed in the semiconductor substrate
10
by using the ion implantation. Then, the silicon nitride block
14
is removed and an isolating dielectric layer
24
is formed on the exposed portion of the floating gate
18
and the exposed surface of the semiconductor substrate
10
, such as shown in the FIG.
1
C. Following, a polysilicon layer is formed on the surface of the isolating dielectric layer
24
and then a control gate
26
is formed by etching to complete a flash memory device structure, such as shown in the FIG.
1
D.
The fabrication method of the flash memory with the poly spacer as the floating gate mentioned above, it is difficult to control the profile and length of the spacer in the formulation of the spacer because of process parameters or device variation, so the channel length of the memory is difficult to control. The channel length of the flash memory formed in the early or late processes cannot repeatedly control.
Besides, owing to the operation method of the flash memory is depending on the technology of injecting or erasing the electric charge from the floating gate and the floating gate of the poly spacer requires a tip for point discharging in the data-erasing step. So, it utilizes the tunneling effect of the Fowler-Nordheim tunneling (F-N tunneling) technology to erase the electric charge as the base of data erasing. The floating gate formed by utilizing the U.S. Pat. No. 5,427,968 disclosed does not provide a good tip structure, so the point discharging effect is limited in the data-erasing step.
Obviously, the main spirit of the present invention is to provide a fabrication method of the flash memory device having a L-shaped ploy spacer as a floating gate, and then some disadvantages of well-known technology are overcome.
SUMMARY OF THE INVENTION
The primary object of the present invention is to provide a fabrication method of a flash memory device with a L-shaped poly spacer for using as a floating gate. The present invention can provide a channel length, which is stably and easily controlled, and a tip structure for point discharging. Hence, the present invention can enhance the isolating effect between the control gate and the floating gate to achieve the purpose of repeating control the fabrication of the semiconductor devices.
Another object of the present invention is to provide fabrication method of a flash memory device with a L-shaped floating gate, which can improve the ability of controlling the processes to form a semiconductor device with a good profile shape.
In order to achieve previous objects, the present invention provides a fabrication method of a flash memory device with a L-shaped floating gate. The fabrication method comprises the following steps. First, an oxide layer and a patterned first dielectric layer are formed on a surface of a semiconductor substrate. Then, a first polysilicon layer and a second dielectric layer are sequentially formed thereon and a anisotropic etching step is performed to etch the second dielectric layer to form a dielectric spacer at a gibbous portion of the first polysilicon layer. Next, the dielectric spacer is used as a mask to etch the first polysilicon layer to form a L-shaped floating gate. After removing the first dielectric layer, a source and a drain are formed in the semiconductor substrate. Then, an isolating dielectric layer and a control gate are sequentially formed on the semiconductor substrate so as to cover a gibbous portion of the L-shaped floating gate and to complete a flash memory device structure with a L-shaped floating gate.
REFERENCES:
patent: 5268319 (1993-12-01), Harari
patent: 5427968 (1995-06-01), Hong
patent: 5541132 (1996-07-01), Davies et al.
patent: 5721147 (1998-02-01), Yoon
patent: 5811853 (1998-09-01), Wang
patent: 6066534 (2000-05-01), Son
patent: 6091104 (2000-07-01), Chen
patent: 6248633 (2001-06-01), Ogura et al.
patent: 6541815 (2003-04-01), Mandelman et al.
patent: 6632745 (2003-10-01), Yap et al.
patent: 402007444 (1990-11-01), None
Horng Jyh-Long
Wen Wen-Ying
Luu Chuong A
Megawin Technology Co., Ltd.
Smith Matthew
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