Fabrication method of an non-volatile memory

Details Fabrication method of an non-volatile memory Fabrication method of an non-volatile memory

2006-10-14

2009-02-03

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21210

Reexamination Certificate

active

07485533

ABSTRACT:
A non-volatile memory cell is provided. The non-volatile memory includes a substrate, a gate stacked layer, an isolation layer and a conductive layer. The gate stacked layer includes a tunneling layer, a charge trapping layer, a barrier layer and a control gate layer sequentially stacked over the substrate, and the stacked gate layer has an opening therein through these layers. The isolation layer is located on the surface of the opening. The conductive layer is disposed in the opening to cover the isolation layer.

REFERENCES:
patent: 5364806 (1994-11-01), Ma et al.
patent: 6885044 (2005-04-01), Ding
patent: 6927131 (2005-08-01), Kim

Affiliated with

Also associated with

Rating

Fabrication method of an non-volatile memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fabrication method of an non-volatile memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication method of an non-volatile memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4136400