Fabrication method of a nonvolatile semiconductor memory

Details Fabrication method of a nonvolatile semiconductor memory Fabrication method of a nonvolatile semiconductor memory

2006-11-28

2006-11-28

Le, Dung A. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S258000, C438S593000, C438S594000, C257S315000, C257S317000, C257SE21252, C257SE21257, C365S185170, C365S185120

Reexamination Certificate

active

07141474

ABSTRACT:
A method of fabricating a nonvolatile semiconductor memory including the steps of: sequentially forming a gate insulating layer and a first conductive layer of a floating gate on a semiconductor substrate; depositing an inter-gate insulating layer; forming an opening in a part of the inter-gate insulating layer; depositing a control gate electrode on the inter-gate insulating layer and an exposed portion of the first conductive layer by the opening; and forming the gate electrodes of the memory cell transistors and the gate electrodes of the select transistors by utilizing the etching processes of the control gate electrode, the inter-gate insulating layer and the first conductive layer, wherein the select transistors include at least a part of the exposed portion of the first conductive layer.

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Y. Iwata, et al., IEEE Journal of Solid State Circuits, vol. 30, No. 11, pp. 1157-1164, “A 35 NS Cycle Time 3.3 V Only 32 Mb NAND Flash EEPROM”, Nov. 1995.

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