Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-01-15
2008-01-15
Fourson, George R. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S261000, C438S263000, C438S266000, C438S287000, C257SE21179, C257SE21180, C257SE21422, C257SE21680
Reexamination Certificate
active
07319058
ABSTRACT:
A fabrication method for a non-volatile memory is provided. To fabricate the non-volatile memory, a plurality of first trenches and second trenches are formed in a substrate, wherein the second trenches are disposed above the first trenches and cross over the first trenches. Then, a tunneling layer and a charge storage layer are sequentially formed on both sidewalls of each second trench. An isolation layer is filled into the first trench. Furthermore, a charge barrier layer is formed on the sidewall of the second trench, and a gate dielectric layer is formed at the bottom of the second trench. A control gate layer is filled into the second trench. Finally, two first doping regions are formed in the substrate at both sides of the control gate layer.
REFERENCES:
patent: 6091102 (2000-07-01), Sekariapuram et al.
patent: 6440801 (2002-08-01), Furukawa et al.
patent: 6842370 (2005-01-01), Forbes
patent: 2004/0197995 (2004-10-01), Lee et al.
Fourson George R.
Jianq Chyun IP Office
Maldonado Julio J.
ProMOS Technologies Inc.
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